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ZAMC4100 Datasheet, PDF (111/155 Pages) Integrated Device Technology – Actuator and Motor Controller
ZAMC4100 Datasheet
4.4.2. Interrupts Configuration
As defined in Table 4.3, the MCU peripheral interrupts can have one of two types of interrupt input responses:
level-sensitive or pulse (edge) triggered:
Table 4.3 MCU Peripheral Interrupts
Interrupt Line
MCU Peripheral Interrupt
Interrupt line 0
Flash controller interrupt
Interrupt line 1
External interrupt (from SBC)
Interrupt line 2
SW-LIN interrupt
Interrupt line 3
SPI interrupt
Interrupt line 4
32-bit timer interrupt
Interrupt line 5
GPIO interrupt
Type
Level-sensitive
Level-sensitive
Level-sensitive
Level-sensitive
Pulse
Level-sensitive
The effect of the pulse and level type is explained in the ARM™ Cortex™-M0 Documentation Kit in the NVIC
section.
4.5. GPIO Module
4.5.1. Overview
There are 8 GPIO pins (GPIO00 to GPIO07) implemented in the MCU. Each GPIO pin can be individually
configured to operate as an input or output. When configured as an output, the value driven out of the GPIO pin
can be directly written or controlled via a set-clear register (see section 4.5.3).
GPIO pin configurations:
• Output mode: enabled by clearing a corresponding bit in registers GPIO_DIR (Table 4.9) and GPIO_OUT
(Table 4.11); e.g., bit 0 = GPIO00 configuration, bit 1 = GPIO01, etc.
• Schmitt trigger input mode with internal pull-down resistors: enabled by setting a corresponding bit in
registers GPIO_DIR and GPIO_IN (Table 4.10)
• Generation of interrupt events on a selectable edge
• Trigger source for the 32-bit timer
By default all GPIOs are set in input mode. Each register in a GPIO module can be accessed with a byte, half-
word and word size.
4.5.2. GPIO Input Mode (default)
Assigned bits in register GPIO_DIR must be cleared for the input operation for a specific GPIO pin (bit numbers
correspond to GPIO numbers). The value for each pin can be read by reading register GPIO_IN. The values from
any GPIO pins that are configured as outputs or which have other functionality should be ignored.
© 2016 Integrated Device Technology, Inc.
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January 26, 2016