MB86290A Datasheet, PDF (56/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

Horizontal synchronization is controlled by the following state transitions:
Otherwis
Disp
Horizontal pixel counter
reaches HDP
Otherwis
Fporch
Bporch
External horizontal
synchronization
detected, or horizontal
synchronization pulse
counter reaches HSW
Sync
Otherwis
When horizontal pixel counter
reaches HTP, counter
initialized
Otherwis
Horizontal pixel counter
suspended and horizontal
synchronization pulse counter
starts counting
State transitions are controlled mainly using the count values of the
horizontal pixel counter. The display duration is equivalent to the Disp state.
When the value of the horizontal pixel counter reaches the setting of the HDP
register, the display duration ends, causing a transition from the Disp state
to the Fporch state (front porch). With the Fporch state established, when
the value of the horizontal pixel counter reaches the setting of the HSP
register, a transition is made to the Sync state. In the Sync state, external
horizontal synchronization signals are supplied. The MB86290A detects the
negation edge of the external horizontal synchronization pulse to perform
synchronization. When the external horizontal synchronization signal is
detected, a transition is made to the Bporch state (back porch). In the Sync
state, the horizontal pixel counter stops, but the horizontal synchronization
pulse counter starts incrementing from 0. When the value of the counter
reaches the setting of the HSW register, a transition is made to the Bporch
state without detecting the external horizontal synchronization signal. With
the Bporch state established, when the value of the horizontal pixel counter
reaches the setting of the HTP register, the horizontal pixel counter is reset
and a transition is made to the Disp state, starting display of the next raster.
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