MB86290A Datasheet, PDF (130/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

MDR2 (Mode Register for Polygon)
Register address
Bit #
Bit field name
R/W
Default
DrawBaseAddress + 428h
31 _{30 29 28 27 26 25 24 23 22} 21 _{20 19 18 17 16 15 14 13 12 11 10 9}
TT
LOG
RW
RW
00
0011
876543210
BM ZW ZCL ZC SM
RW RW
RW
RW
RW
0 0 0000 0
0
This register controls the polygon draw mode.
Bit 0
SM (Shading Mode)
Sets shading mode
0
Flat shading
1
Gouraud shading
Bit 2
ZC (Z Compare mode)
Sets Z comparison mode
0
Disable
1
Enable
Bits 5-3
ZCL (Z Compare Logic)
Select type of Z comparison
000
NEVER
001
ALWAYS
010
LESS
011
LEQUAL
100
EQUAL
101
GEQUAL
110
GREATER
111
NOTEQUAL
Bit 6
ZW (Z Write mask)
Sets ZWRITEMASK
0
Compare Z values and overwrite result to Z buffer
1
Compare Z values and do not overwrite result to Z buffer
Bits 8-7
BM (Blend Mode)
Set blend mode
00 Normal (source copy)
01 Alpha blending
10 Logical calculation enable
11 Reserved
130