MB86290A Datasheet, PDF (11/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

1.5 Functional Overview
1.5.1 System Configuration
Host CPU interface
MB86290A can be connected to Hitachi’s SH3 or SH4 CPUs and NEC’s
V832 CPU without any glue logic. The host MB86290A CPU interface can
drive the host CPU DMAC and transfer all graphical source data (display list,
texture patterns, etc.) from the host (main) memory to it’s internal registers
(or external frame memory).
Graphics memory
Synchronous DRAM is attached externally. Either the 32-bit or 64-bit mode
is supported as the interface with these external SDRAM devices. The
external SDRAM operation frequency is the same as MB86290A (up to 100
MHz). Applicable memory device configurations are as follows:
Graphics Memory Device Configuration
Type
SDRAM 64 Mbit (x32 bit)
SDRAM 64 Mbit (x32 bit)
SDRAM 64 Mbit (x16Bit)
Data bus width
32 bit
64 bit
64 bit
# of devices
1
2
4
Total capacity
8 MB
16 MB
32 MB
Display signals
MB86290A has three channels of 8-bit D/A converters and outputs analog
RGB signals. Superimposing is possible by applying an external sync signal.
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