MB86290A Datasheet, PDF (110/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

Set the display start position (X-coordinate) for the ML layer in pixel units
relative to the origin of the logical frame.
MLDY (ML-layer Display position Y)
DisplayBaseAddress + 56h
Register address
Bit #
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit field name
Reserved
MLDY
R/W
R0
RW
Default
0
Don’t care
Set the display start position (Y-coordinate) for the ML layer in pixel units
relative to the origin of the logical frame.
MRM (MR-layer Mode)
Register address ^{DisplayBaseAddress + 58}
Bit #
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name ^MRC MRFLP
Reserve
MRW
Reserve
MRH
R/W
RW _R0
R0
RW
R0
RW
Default
00
0
Don’t care
0
Don’t care
Bits 11-0 MRH (MR-layer Height)
Set height of Middle Right (MR) layer logical frame size in raster units. Setting + 1 is the height.
Bits 23-16
MRW (MR-layer memory Width)
Set width of Middle Right (MR) layer logical frame size in 64-byte units
Bits 30-29
MRFLP (MR-layer Flip mode)
Set flipping mode for Middle Right (MR) layer
00 Display frame 0
01 Display frame 1
10 Switch frame 0 and 1 back and forth
11 Reserved
Bit 31
MRC (MR-layer Color mode)
Sets color mode for Middle Right (MR) layer
0
Indirect color mode (8 bits/pixel)
1
Direct color mode (16 bits/pixel)
110