MB86290A Datasheet, PDF (118/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

CUX0 (Cursor-0 X position)
Register address ^{DisplayBaseAddress + A8h}
Bit #
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit field name
Reserved
CUX0
R/W
R0
RW
Default
0
Don’t care
This register controls the horizontal position of the cursor-0 pattern left edge.
Set the left-edge position of the cursor-0 pattern from the start edge of the
display field in dot-clock units.
CUY0 (Cursor-0 Y position)
Register address ^{DisplayBaseAddress + Aah}
Bit #
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit field name
Reserved
CUY0
R/W
R0
RW
Default
0
Don’t care
This register controls the vertical position of the cursor-0 pattern top edge.
Set the top edge position of the cursor-0 pattern from the start edge of the
display field in raster units.
CUOA1 (Cursor-1 Origin Address)
Register address ^{DisplayBaseAddress + ACh}
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserve
R0
0
CUOA1
RW
Don’t care
R0
0000
This register controls the start address of the cursor-1 pattern. Since the
lowest 4 bits are fixed to 0, this address is 16-byte aligned.
CUX1 (Cursor-1 X position)
DisplayBaseAddress + B0h
Register address
Bit #
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit field name
Reserved
CUX1
R/W
R0
RW
Default
0
Don’t care
This register controls the horizontal position of the cursor-1 pattern left edge.
Set the left edge position of the cursor-0 pattern from the start edge of the
display field in dot-clock units.
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