MB86290A Datasheet, PDF (27/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

♦ Contains 8-bit precision D/A converters and outputs analog RGB
signals
♦ Uses CSYNC signal and external circuits to generate composite video
signal
♦ Can output analog RGB signals synchronously to external video
signal
♦ Can synchronize to either DCLKI signal input or internal dot clock
♦ HSYNC and VSYNC reset to output mode. These signals must be
pulled up externally.
♦ AOUTR, AOUTG and AOUTB must be terminated at 75 Ÿ.
♦ 1.1 V is input to VREF. A bypass capacitor (with good high-
frequency characteristics) must be inserted between VREF and AVS.
♦ ACOMPR, ACOMPG and ACOMPB are tied to analog VDD via 0.1-µF
ceramic capacitors.
♦ VRO must be pulled down to analog ground by a 2.7-kŸ resistor.
♦ HSYNC, VSYNC and EO can tolerate input voltage levels of 5 V.
However, NEVER input 5 V to these pins when power is not supplied
to MB86290A. (See the maximum voltage specification in the
electrical characteristics.)
♦ When producing a non-interlaced display in the external
synchronous mode, input 0 to the EO pin by using a pull-down
resistor, etc.
♦ The GV signal switches graphics and video at chroma key operation.
When video I is selected, the L level is output.
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