MB86290A Datasheet, PDF (163/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

8.2.3 Timing of Write Access to Same Row Address
MCLKO
MRAS
MCAS
MWE
TRCD
MA
ROW
COL
COL
COL
COL
MD
DATA DATA DATA DATA
DQM
ROW: Row Address
COL: Column Address
DATA: READ DATA
TRCD: RAS to CAS Delay Time
Fig. 8.2.3 Timing of Write Access to Same Row Address
This timing diagram shows that the same row address of SDRAM is write-
accessed four times from MB86290A. The Write command is issued after
TRCD has elapsed after the ACTV command is issued. Then, data is written
to SDRAM.
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