MB86290A Datasheet, PDF (139/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

ALF (Alpha Factor)
Register address ^{DrawBaseAddress + 488h}
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
A
RW
0
This register controls the alpha blending ratio.
BLP (Broken Line Pattern)
DrawBaseAddress + 48Ch
Register address
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
BLP
RW
0
This register controls the broken-line pattern. The bit 1 set in the broken-
line pattern is drawn in the foreground color and bit 0 is drawn in the
background color. The actual line pattern is pasted from MSB to LSB to the
line to be drawn. If the length of the applied line is longer than 32 bits, the
same line pattern is wrapped around in 32-bit units. The current position
(bit #) of the line pattern used for the line is set in the BLPO register.
TBC (Texture Border Color)
DrawBaseAddress + 494h
Register address
Bit #
Bit field name
R/W
Default
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
-
BC
R0
RW
0
0
This register controls the texture mapping border color.
Bits 14-0 BC (Border Color)
Set border color of texture mapping. Only the direct color mode is used.
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