MB86290A Datasheet, PDF (102/184 Pages) Fujitsu Component Limited. – Graphics Controller Hardware Specifications

DCE (Display Controller Enable)
Register address ^{DisplayBaseAddress + 02h}
Bit #
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit field name DEN
Reserved
BE ME WE CE
R/W
RW
R0
RW RW RW RW
Default
0
0
0
0
0
0
This register controls the video signal output and enables display of each
layer.
Bit 0
Bit 1
Bit 2
Bit 3
Bit 15
CE (C layer Enable)
Enables C-layer display
0
Does not display C layer
1
Displays C-layer
WE (W layer Enable)
Enables W-layer display
0
Does not display W-layer
1
Displays W layer
ME (M layer Enable)
Enables M layer display
0
Does not display M layer
1
Displays M layer
BE (BL-layer Enable)
Enables ML-layer display
0
Does not display B layer
1
Displays B layer
DEN (Display Enable)
Enables display
0
Does not output display signal
1
Outputs display signal
102