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MC68HC08GZ32 Datasheet, PDF (97/320 Pages) Freescale Semiconductor, Inc – Microcontrollers
INTERNAL BUS
Functional Description
KBD0
KBIP0
KBD7
KBIP7
VECTOR FETCH
DECODER
1
0S
KBIE0
ACKK
RESET
1
0S
KBIE7
VDD
CLR
D
Q
CK
MODEK
KEYF
SYNCHRONIZER
IMASKK
KEYBOARD
INTERRUPT
REQUEST
Figure 9-2. Keyboard Module Block Diagram
Addr.
Register Name
Keyboard Status and Control Read:
$001A
Register (INTKBSCR) Write:
See page 100. Reset:
$001B
Keyboard Interrupt Enable Read:
Register (INTKBIER) Write:
See page 100. Reset:
$0448
Keyboard Interrupt Polarity Read:
Register (INTKBIPR) Write:
See page 101. Reset:
Bit 7
0
0
KBIE7
0
KBIP7
0
6
5
0
0
0
0
KBIE6 KBIE5
0
0
KBIP66 KBIP5
0
0
= Unimplemented
4
0
0
KBIE4
0
KBIP4
0
3
KEYF
0
KBIE3
0
KBIP3
0
Figure 9-3. I/O Register Summary
2
0
ACKK
0
KBIE2
0
KBIP2
0
1
Bit 0
IMASKK MODEK
0
0
KBIE1 KBIE0
0
0
KBIP1 KBIP0
0
0
If the MODEK bit is set and depending on the KBIPx bit, the keyboard interrupt pins are both falling (or
rising) edge and low (or high) level sensitive, and both of the following actions must occur to clear a
keyboard interrupt request:
• Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a 1 to the
ACKK bit in the keyboard status and control register (INTKBSCR). The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine can also
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling (or rising) edge that occurs after writing to the ACKK bit
MC68HC08GZ32 Data Sheet, Rev. 3
Freescale Semiconductor
97