MC68HC08GZ32 Datasheet, PDF (122/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

MSCAN08 Controller (MSCAN08)
ID28
IDR0
ID21 ID20
IDR1
ID15 ID14
IDR2
ID10
IDR0
ID3 ID2
IDR1 IDE ID10
IDR2
ID7 ID6
IDR3
RTR
ID3 ID10
IDR3
ID3
AM7 CIDMR0 AM0
AC7 CIDAR0 AC0
ID ACCEPTED (FILTER 0 HIT)
AM7 CIDMR1 AM0
AC7 CIDAR1 AC0
ID ACCEPTED (FILTER 1 HIT)
AM7 CIDMR2 AM0
AC7 CIDAR2 AC0
ID ACCEPTED (FILTER 2 HIT)
AM7 CIDMR3 AM0
AC7 CIDAR3 AC0
ID ACCEPTED (FILTER 3 HIT)
Figure 12-6. Quadruple 8-Bit Maskable Acceptance Filters
12.6 Interrupts
The MSCAN08 supports four interrupt vectors mapped onto eleven different interrupt sources, any of
which can be individually masked. For details, see 12.13.5 MSCAN08 Receiver Flag Register (CRFLG)
through 12.13.8 MSCAN08 Transmitter Control Register.
1. Transmit Interrupt: At least one of the three transmit buffers is empty (not scheduled) and can be
loaded to schedule a message for transmission. The TXE flags of the empty message buffers are
set.
MC68HC08GZ32 Data Sheet, Rev. 3
122
Freescale Semiconductor