MC68HC08GZ32 Datasheet, PDF (27/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2
Memory Map
2.1 Introduction
The CPU08 can address 64 Kbytes of memory space. The memory map, shown in Figure 2-1, includes:
• 1536 bytes of random-access memory (RAM)
• 32,256 bytes of read-only memory (ROM)
• 52 bytes of user-defined vectors
• 304 bytes of monitor ROM
2.2 Unimplemented Memory Locations
Accessing an unimplemented location can cause an illegal address reset. In the memory map (Figure 2-1)
and in register figures in this document, unimplemented locations are shaded.
2.3 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on microcontroller (MCU) operation. In the
Figure 2-1 and in register figures in this document, reserved locations are marked with the word Reserved
or with the letter R.
Data registers are shown in Figure 2-2. Table 2-1 is a list of vector locations.
2.4 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area of $0000–$003F or $0440-$0461.
Additional miscellaneous registers have these addresses:
• $FE00; SIM break status register, SBSR
• $FE01; SIM reset status register, SRSR
• $FE02; Reserved
• $FE03; SIM break flag control register, SBFCR
• $FE04; Interrupt status register 1, INT1
• $FE05; Interrupt status register 2, INT2
• $FE06; Interrupt status register 3, INT3
• $FE07; Interrupt status register 4, INT4
• $FE08; Reserved
• $FE09; Break address register high, BRKH
• $FE0A; Interrupt address register low, BRKL
• $FE0B; Interrupt status and control register, BRKSCR
• $FE0C; LVI status register, LVISR
• $FE0E and $FE0E — Reserved
• $FE0F; Unimplemented
MC68HC08GZ32 Data Sheet, Rev. 3
Freescale Semiconductor
27