MC68HC08GZ32 Datasheet, PDF (54/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Clock Generator Module (CGM)
OSC2
OSCILLATOR (OSC)
OSC1
SIMOSCEN (FROM SIM)
OSCSTOPENB
(FROM CONFIG)
PHASE-LOCKED LOOP (PLL)
CGMXCLK
(TO: SIM, TBM, ADC, MSCAN)
CGMRCLK
V_DDA
CGMXFC
CLOCK
A
BCS
SELECT
CIRCUIT
÷ 2 _{B S*}
*WHEN S = 1,
V_SSA
CGMOUT = B
VPR1–VPR0
VRS7–VRS0
CGMOUT
(TO SIM)
SIMDIV2
(FROM SIM)
PHASE
DETECTOR
LOCK
DETECTOR
LOOP
FILTER
VOLTAGE
CONTROLLED
OSCILLATOR
PLL ANALOG
AUTOMATIC
MODE
CONTROL
INTERRUPT
CONTROL
CGMVCLK
LOCK
MUL11–MUL0
AUTO ACQ
PLLIE PLLF
CGMVDV
FREQUENCY
DIVIDER
Figure 4-1. CGM Block Diagram
CGMINT
(TO SIM)
MC68HC08GZ32 Data Sheet, Rev. 3
54
Freescale Semiconductor