MC68HC08GZ32 Datasheet, PDF (33/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Unused ROM Locations
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Timer 2 Channel 1 Status and ^{Read: CH1F}
CH1IE
0
MS1A ELS1B ELS1A TOV1
$0033 Control Register (T2SC1) Write: 0
See page 268. _Reset:
0
0
0
0
0
0
0
Timer 2 Channel 1 ^Read: _{Bit 15}
14
13
12
11
10
9
$0034 Register High (T2CH1H) Write:
See page 274. _Reset:
Indeterminate after reset
Timer 2 Channel 1 ^Read: _{Bit 7}
6
5
4
3
2
1
$0035
Register Low (T2CH1L) Write:
See page 274. _Reset:
Indeterminate after reset
$0036
PLL Control Register ^Read: _PLLIE
PLLF
PLLON
BCS
R
(PCTL) Write:
See page 63. _Reset:
0
0
1
0
0
R
VPR1
0
0
PLL Bandwidth Control ^Read: _AUTO
LOCK
ACQ
0
0
0
0
$0037
Register (PBWC) Write:
See page 64. _Reset:
0
0
0
0
0
0
0
PLL Multiplier Select High ^Read:
0
0
0
0
MUL11 MUL10 MUL9
$0038
Register (PMSH) Write:
See page 65. _Reset:
0
0
0
0
0
0
0
$0039
PLL Multiplier Select Low ^Read:
Register (PMSL) Write:
See page 66. _Reset:
MUL7
0
MUL6
0
MUL5
0
MUL4
0
MUL3
U
MUL2
U
MUL1
U
$003A
PLL VCO Select Range ^Read:
Register (PMRS) Write:
See page 66. _Reset:
VRS7
0
VRS6
1
VRS5
0
VRS4
0
VRS3
0
VRS2
0
VRS1
0
$003B
Read: 0
0
0
0
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
0
ADC Status and Control ^Read: _COCO
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1
$003C
Register (ADSCR) Write:
See page 47. _Reset:
0
0
0
1
1
1
1
ADC Data High Register ^Read:
0
0
0
0
0
0
AD9
$003D
(ADRH) Write:
See page 49. _Reset:
Unaffected by reset
ADC Data Low Register ^{Read: AD7}
AD6
AD5
AD4
A3
AD2
AD1
$003E
(ADRL) Write:
See page 49. _Reset:
Unaffected by reset
$003F
ADC Clock Register ^Read: _ADIV2
ADIV1
ADIV0 ADICLK MODE1 MODE0
R
(ADCLK) Write:
See page 51. _Reset:
0
0
0
0
0
1
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 8)
Bit 0
CH1MAX
0
Bit 8
Bit 0
VPR0
0
R
0
MUL8
0
MUL0
U
VRS0
0
R
1
ADCH0
1
AD8
AD0
0
0
MC68HC08GZ32 Data Sheet, Rev. 3
Freescale Semiconductor
33