MC68HC08GZ32 Datasheet, PDF (156/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
NOTE
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 13-11 shows the port C I/O logic.
When bit DDRCx is a 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a 0,
reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 13-4 summarizes the operation of the port C pins.
V_DD
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
DDRCx
PTCx
PTCPUEx
INTERNAL
PULLUP
DEVICE
PTCx
READ PTC ($0002)
Figure 13-11. Port C I/O Circuit
Table 13-4. Port C Pin Functions
PTCPUE
Bit
1
0
X
DDRC
Bit
0
0
1
PTC
Bit
X⁽¹⁾
X
X
I/O Pin
Mode
Input, V_DD(2)
Input, Hi-Z⁽⁴⁾
Output
Accesses
to DDRC
Read/Write
DDRC6–DDRC0
DDRC6–DDRC0
DDRC6–DDRC0
1. X = Don’t care
2. I/O pin pulled up to V_DD by internal pullup device.
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
Accesses
to PTC
Read
Write
Pin
PTC6–PTC0⁽³⁾
Pin
PTC6–PTC0⁽³⁾
PTC6–PTC0 PTC6–PTC0
13.5.3 Port C Input Pullup Enable Register
The port C input pullup enable register (PTCPUE) contains a software configurable pullup device for each
of the seven port C pins. Each bit is individually configurable and requires that the data direction register,
DDRC, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRC is configured for output mode.
MC68HC08GZ32 Data Sheet, Rev. 3
156
Freescale Semiconductor