MC68HC08GZ32 Datasheet, PDF (113/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

LVI Status Register
11.3.4 LVI Trip Selection
The LVI5OR3 bit in the mask option register selects whether the LVI is configured for 5-V or 3-V
protection.
NOTE
The microcontroller is guaranteed to operate at a minimum supply voltage.
The trip point (V_TRIPF [5 V] or V_TRIPF [3 V]) may be lower than this. See
Chapter 21 Electrical Specifications for the actual trip point voltages.
11.4 LVI Status Register
The LVI status register (LVISR) indicates if the V_DD voltage was detected below the V_TRIPF level.
Address: $FE0C
Bit 7
6
5
4
3
2
1
Bit 0
Read: LVIOUT
0
0
0
0
0
0
0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 11-3. LVI Status Register (LVISR)
LVIOUT — LVI Output Bit
This read-only flag becomes set when the V_DD voltage falls below the V_TRIPF trip voltage (see
Table 11-1). Reset clears the LVIOUT bit.
Table 11-1. LVIOUT Bit Indication
V_DD
V_DD > V_TRIPR
V_DD < V_TRIPF
V_TRIPF < V_DD < V_TRIPR
LVIOUT
0
1
Previous value
11.5 LVI Interrupts
The LVI module does not generate interrupt requests.
11.6 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby modes.
11.6.1 Wait Mode
If enabled, the LVI module remains active in wait mode. If enabled to generate resets, the LVI module can
generate a reset and bring the MCU out of wait mode.
MC68HC08GZ32 Data Sheet, Rev. 3
Freescale Semiconductor
113