MC68HC08GZ32 Datasheet, PDF (164/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
Address:
Read:
Write:
Reset:
Alternate Function:
$0441
Bit 7
6
5
4
3
2
PTG7
PTG6
PTG5
PTG4
PTG3
PTG2
Unaffected by reset
AD23
AD22
AD21
AD20
AD19
AD18
Figure 13-23. Port G Data Register (PTG)
1
PTG1
AD17
Bit 0
PTG0
AD16
PTG7–PTG0 — Port G Data Bits
These read/write bits are software-programmable. Data direction of each port G pin is under the control
of the corresponding bit in data direction register G. Reset has no effect on port G data.
AD23–AD16 — Analog-to-Digital Input Bits
AD23–AD16 are pins used for the input channels to the analog-to-digital converter module. The
channel select bits in the ADC status and control register define which port G pin will be used as an
ADC input and overrides any control from the port I/O logic by forcing that pin as the input to the analog
circuitry.
NOTE
Care must be taken when reading port G while applying analog voltages to
AD23–AD16 pins. If the appropriate ADC channel is not enabled, excessive
current drain may occur if analog voltages are applied to the PTGx/ADx pin,
while PTG is read as a digital input during the CPU read cycle. Those ports
not selected as analog input channels are considered digital I/O ports.
13.9.2 Data Direction Register G
Data direction register G (DDRG) determines whether each port G pin is an input or an output. Writing a 1
to a DDRG bit enables the output buffer for the corresponding port G pin; a 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0445
Bit 7
6
5
4
3
2
1
DDRG7 DDRG6 DDRG5 DDRG4 DDRG3 DDRG2 DDRG1
0
0
0
0
0
0
0
Figure 13-24. Data Direction Register G (DDRG)
Bit 0
DDRG0
0
DDRG7–DDRG0 — Data Direction Register G Bits
These read/write bits control port G data direction. Reset clears DDRG7–DDRG0], configuring all port
G pins as inputs.
1 = Corresponding port G pin configured as output
0 = Corresponding port G pin configured as input
NOTE
Avoid glitches on port G pins by writing to the port G data register before
changing data direction register G bits from 0 to 1.
Figure 13-25 shows the port G I/O logic.
MC68HC08GZ32 Data Sheet, Rev. 3
164
Freescale Semiconductor