MC68HC08GZ32 Datasheet, PDF (71/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5
Mask Options
5.1 Introduction
This section describes the mask options and the mask option registers.
5.2 Functional Description
The mask options are hard-wired connections, specified at the same time as the ROM code, which allow
the user to customize the MCU. The options control the enable or disable ability of the following functions:
• Stop mode recovery time (32 CGMXCLK cycles or 4096 CGMXCLK cycles)
• COP timeout period (262,128 or 8176 COPCLK cycles)
• STOP instruction
• Computer operating properly module (COP)
• Low-voltage inhibit (LVI) module control and voltage trip point selection
• Enable/disable the oscillator (OSC) during stop mode
• Enable/disable an extra divide by 128 prescaler in timebase module
• Enable for MSCAN08
• Selectable clockout (MCLK) feature with divide by 1, 2, and 4 of the bus or crystal frequency. Once
configured for MCLK, the PTD data direction register for PTD0 is used to enable and disable the
MCLK output.
• Enhanced SCI clock select
5.3 Mask Option Register 2 (MOR2)
Address:
Read:
Write:
Reset:
$001E
Bit 7
0
6
5
MCLKSEL MCLK1
4
3
2
1
Bit 0
MCLK0 MSCANEN TMCLSEL OSCENISTOP SCIBSRC
Unaffected by reset
= Unimplemented
Figure 5-1. Mask Option Register 2 (MOR2)
MCLKSEL — MCLK Source Select Bit
1 = Crystal frequency
0 = Bus frequency
MC68HC08GZ32 Data Sheet, Rev. 3
Freescale Semiconductor
71