MC68HC08GZ32 Datasheet, PDF (193/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

ESCI Arbiter
Table 14-10. ESCI Prescaler Divisor Fine Adjust (Continued)
PSSB[4:3:2:1:0]
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Prescaler Divisor Fine Adjust (PDFA)
14/32 = 0.4375
15/32 = 0.46875
16/32 = 0.5
17/32 = 0.53125
18/32 = 0.5625
19/32 = 0.59375
20/32 = 0.625
21/32 = 0.65625
22/32 = 0.6875
23/32 = 0.71875
24/32 = 0.75
25/32 = 0.78125
26/32 = 0.8125
27/32 = 0.84375
28/32 = 0.875
29/32 = 0.90625
30/32 = 0.9375
31/32 = 0.96875
Use the following formula to calculate the ESCI baud rate:
Frequency of the SCI clock source
Baud rate = _{64 x BPD x BD x (PD + PDFA)}
where:
Frequency of the SCI clock source = f_Bus or CGMXCLK (selected by
ESCIBDSRC in the MOR2 register)
BPD = Baud rate register prescaler divisor
BD = Baud rate divisor
PD = Prescaler divisor
PDFA = Prescaler divisor fine adjust
Table 14-11 shows the ESCI baud rates that can be generated with a 4.9152-MHz bus frequency.
14.9 ESCI Arbiter
The ESCI module comprises an arbiter module designed to support software for communication tasks as
bus arbitration, baud rate recovery and break time detection. The arbiter module consists of an 9-bit
counter with 1-bit overflow and control logic. The CPU can control operation mode via the ESCI arbiter
control register (SCIACTL).
MC68HC08GZ32 Data Sheet, Rev. 3
Freescale Semiconductor
193