MC68HC08GZ32 Datasheet, PDF (271/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

I/O Registers
19.8.4 TIM2 Channel Status and Control Registers
Each of the TIM2 channel status and control registers:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare, or PWM operation
• Selects high, low, or toggling output on output compare
• Selects rising edge, falling edge, or any edge as the active input capture trigger
• Selects output toggling on TIM2 overflow
• Selects 0% and 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
Register Name and Address
Bit 7
6
Read: CH0F
Write: 0
CH0IE
Reset: 0
0
T2SC0 — $0030
5
4
MS0B MS0A
0
0
3
ELS0B
0
2
ELS0A
0
1
TOV0
0
Bit 0
CH0MAX
0
Register Name and Address
Bit 7
6
Read: CH1F
Write: 0
CH1IE
Reset: 0
0
T2SC1 — $0033
5
4
0
MS1A
0
0
3
ELS1B
0
2
ELS1A
0
1
TOV1
0
Bit 0
CH1MAX
0
Register Name and Address
Bit 7
6
Read: CH2F
Write: 0
CH2IE
Reset: 0
0
T2SC2 — $456
5
4
MS2B MS2A
0
0
3
ELS2B
0
2
ELS2A
0
1
TOV2
0
Bit 0
CH2MAX
0
Register Name and Address
Bit 7
6
Read: CH3F
Write: 0
CH3IE
Reset: 0
0
T2SC3 — $0459
5
4
0
MS3A
0
0
3
ELS3B
0
2
ELS3A
0
1
TOV3
0
Bit 0
CH3MAX
0
Register Name and Address
Bit 7
6
Read: CH4F
Write: 0
CH4IE
Reset: 0
0
T2SC4 — $045C
5
4
MS4B MS4A
0
0
3
ELS4B
0
2
ELS4A
0
1
TOV4
0
Bit 0
CH4MAX
0
Register Name and Address
T2SC5 — $045F
Bit 7
6
5
4
Read: CH5F
0
CH5IE
MS5A
Write: 0
Reset: 0
0
0
0
= Unimplemented
3
ELS5B
0
2
ELS5A
0
1
TOV5
0
Bit 0
CH5MAX
0
Figure 19-8. TIM2 Channel Status and Control Registers (T2SC0:T2SC5)
MC68HC08GZ32 Data Sheet, Rev. 3
Freescale Semiconductor
271