MC68HC08GZ32 Datasheet, PDF (172/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Enhanced Serial Communications Interface (ESCI) Module
INTERNAL BUS
÷4
SCP1
SCP0
SCR1
SCR2
SCR0
PRE-
BAUD
SCALER DIVIDER
÷ 16
TXINV
ESCI DATA REGISTER
11-BIT
TRANSMIT
SHIFT REGISTER
H876543210L
SCI_TxD
PDS2
PDS1
PDS0
PSSB4
PSSB3
PSSB2
PSSB1
PSSB0
M
PEN
PARITY
PTY
GENERATION
T8
TRANSMITTER
CONTROL LOGIC
SCTE
SCTE
SCTIE
TC
TCIE
SCTIE
TC
TCIE
Figure 14-5. ESCI Transmitter
SBK
LOOPS
ENSCI
TE
LINT
14.4.2.1 Character Length
The transmitter can accommodate either 8-bit or 9-bit data. The state of the M bit in ESCI control
register 1 (SCC1) determines character length. When transmitting 9-bit data, bit T8 in ESCI control
register 3 (SCC3) is the ninth bit (bit 8).
14.4.2.2 Character Transmission
During an ESCI transmission, the transmit shift register shifts a character out to the TxD pin. The ESCI
data register (SCDR) is the write-only buffer between the internal data bus and the transmit shift register.
To initiate an ESCI transmission:
1. Enable the ESCI by writing a 1 to the enable ESCI bit (ENSCI) in ESCI control register 1 (SCC1).
2. Enable the transmitter by writing a 1 to the transmitter enable bit (TE) in ESCI control register 2
(SCC2).
3. Clear the ESCI transmitter empty bit (SCTE) by first reading ESCI status register 1 (SCS1) and
then writing to the SCDR. For 9-bit data, also write the T8 bit in SCC3.
4. Repeat step 3 for each subsequent transmission.
MC68HC08GZ32 Data Sheet, Rev. 3
172
Freescale Semiconductor