MC68HC08GZ32 Datasheet, PDF (152/320 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
READ DDRA ($0004)
WRITE DDRA ($0004)
RESET
WRITE PTA ($0000)
DDRAx
PTAx
PTAPUEx
V_DD
INTERNAL
PULLUP
DEVICE
PTAx
READ PTA ($0000)
Figure 13-4. Port A I/O Circuit
Table 13-2. Port A Pin Functions
PTAPUE DDRA PTA
Bit
Bit Bit
I/O Pin
Mode
Accesses
to DDRA
Read/Write
1
0
X⁽¹⁾ Input, V_DD(2) ^{DDRA7–DDRA0}
0
0
X _{Input, Hi-Z}⁽⁴⁾ DDRA7–DDRA0
X
1
X
Output
DDRA7–DDRA0
1. X = Don’t care
2. I/O pin pulled up to V_DD by internal pullup device
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
Accesses
to PTA
Read
Write
Pin
PTA7–PTA0⁽³⁾
Pin
PTA7–PTA0⁽³⁾
PTA7–PTA0 PTA7–PTA0
13.3.3 Port A Input Pullup Enable Register
The port A input pullup enable register (PTAPUE) contains a software configurable pullup device for each
of the eight port A pins. Each bit is individually configurable and requires that the data direction register,
DDRA, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRA is configured for output mode.
NOTE
Pullup or pulldown resistors are automatically selected for keyboard
interrupt pins depending on the bit settings in the keyboard interrupt polarity
register (INTKBIPR) see 9.7.3 Keyboard Interrupt Polarity Register.
MC68HC08GZ32 Data Sheet, Rev. 3
152
Freescale Semiconductor