EP2SGX30C Datasheet, PDF (6/314 Pages) Altera Corporation – Stratix II GX Device

Features
Table 1–1. Stratix II GX Device Features (Part 2 of 2)
Feature
Package
EP2SGX30C/D
EP2SGX60C/D/E
EP2SGX90E/F
EP2SGX130/G
C
D
C
D
E
E
F
G
780-pin
FineLine BGA
780-pin 1,152-pin
FineLine BGA FineLine
BGA
1,152-pin
FineLine
BGA
1,508-pin
FineLine
BGA
1,508-pin
FineLine BGA
Note to Table 1–1:
(1) Includes two sets of dual-purpose differential pins that can be used as two additional channels for the differential
receiver or differential clock inputs.
Stratix II GX devices are available in space-saving FineLine BGA
packages (refer to Table 1–2). All Stratix II GX devices support vertical
migration within the same package. Vertical migration means that you
can migrate to devices whose dedicated pins, configuration pins, and
power pins are the same for a given package across device densities. For
I/O pin migration across densities, you must cross-reference the available
I/O pins using the device pin-outs for all planned densities of a given
package type to identify which I/O pins are migratable. Table 1–3 lists the
Stratix II GX device package sizes.
Table 1–2. Stratix II GX Package Options (Pin Counts and Transceiver Channels)
Device
Transceiver
Channels
Source-Synchronous
Channels
Receive (1) Transmit
EP2SGX30C
4
EP2SGX60C
4
EP2SGX30D
8
EP2SGX60D
8
EP2SGX60E
12
EP2SGX90E
12
EP2SGX90F
16
EP2SGX130G
20
31
29
31
29
31
29
31
29
42
42
47
45
59
59
73
71
Maximum User I/O Pin Count
780-Pin
FineLine BGA
(29 mm)
361
364
361
364
—
—
—
—
1,152-Pin
FineLine BGA
(35 mm)
—
—
—
—
534
558
—
—
1,508-Pin
FineLine BGA
(40 mm)
—
—
—
—
—
—
650
734
Note to Table 1–2:
(1) Includes two differential clock inputs that can also be used as two additional channels for the differential receiver.
1–4
Stratix II GX Device Handbook, Volume 1
Altera Corporation
October 2007