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EP2SGX30C Datasheet, PDF (307/314 Pages) Altera Corporation – Stratix II GX Device | |||
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DC and Switching Characteristics
Table 4â118. Document Revision History (Part 2 of 5)
Date and
Document
Version
August 2007
v4.4
May 2007 v4.3
Changes Made
Removed note âThe data in this table is preliminary.
Altera will provide a report upon completion of
characterization of the Stratix II GX devices.
Conditions for testing the silicon have not been
determined.â from each table.
Removed note âThe data in Tables xxx through xxx
is preliminary. Altera will provide a report upon
completion of characterization of the Stratix II GX
devices. Conditions for testing the silicon have not
been determined.â in the clock timing parameters
sections.
Updated clock timing parameter Tables 4â63
through 4â78 (Table 4â75 was unchanged).
Updated Table 4â21 and added new Table 4â22.
Updated:
â Table 4â6
â Table 4â16
â Table 4â19
â Table 4â49
â Table 4â52
â Table 4â107
Added note to Table 4â50.
Added:
â Figure 4â3
â Figure 4â4
â Figure 4â5
Added the âReferenced Documentsâ section.
Changed 1.875 KHz to 1.875 MHz in Table 4â19,
XAUI Receiver Jitter Tolerance section.
Summary of Changes
Altera Corporation
October 2007
4â137
Stratix II GX Device Handbook, Volume 1
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