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EP2SGX30C Datasheet, PDF (220/314 Pages) Altera Corporation – Stratix II GX Device
Operating Conditions
Table 4–36. SSTL-18 Class II Specifications
Symbol
Parameter
Conditions
Minimum
VCCIO Output supply voltage
VREF Reference voltage
VTT
Termination voltage
VIH (DC) High-level DC input voltage
VIL (DC) Low-level DC input voltage
VIH (AC) High-level AC input voltage
VIL (AC) Low-level AC input voltage
VOH
High-level output voltage
VOL
Low-level output voltage
IOH = –13.4 mA (1)
IOL = 13.4 mA (1)
1.71
0.855
VREF – 0.04
VREF + 0.125
VREF + 0.25
VCCIO – 0.28
Typical
1.8
0.9
VREF
Maximum Unit
1.89
V
0.945
V
VREF + 0.04 V
V
VREF – 0.125 V
V
VREF – 0.25 V
V
0.28
V
Note to Table 4–36:
(1) This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II GX Architecture chapter in volume 1 of the Stratix II GX Device Handbook.
Table 4–37. SSTL-18 Class I and II Differential Specifications
Symbol
Parameter
Conditions Minimum
Typical
Maximum Unit
VCCIO
VSWING
(DC)
VX (AC)
VSWING
(AC)
VISO
ΔVISO
VOX (AC)
Output supply voltage
DC differential input voltage
AC differential input cross
point voltage
AC differential input voltage
Input clock signal offset
voltage
Input clock signal offset
voltage variation
AC differential cross point
voltage
1.71
1.8
1.89
V
0.25
V
(VCCIO/2) – 0.175
0.5
(VCCIO/2) + 0.175 V
V
0.5 VCCIO
V
200
mV
(VCCIO/2) – 0.125
(VCCIO/2) + 0.125 V
4–50
Stratix II GX Device Handbook, Volume 1
Altera Corporation
October 2007