EP2SGX30C Datasheet, PDF (195/314 Pages) Altera Corporation – Stratix II GX Device

DC and Switching Characteristics
Table 4–19. Stratix II GX Transceiver Block AC Specification Notes (1), (2), (3) (Part 8 of 19)
Symbol/
Description
Conditions
-3 Speed
Commercial Speed
Grade
-4 Speed
Commercial and
Industrial Speed
Grade
-5 Speed
Commercial Speed
Grade
Unit
Min Typ Max Min Typ Max Min Typ Max
GIGE Transmit Jitter Generation (12)
Deterministic Jitter Data Rate =
-
(peak-to-peak) 1.25 Gbps
REFCLK = 125 MHz
Pattern = CRPAT
V_OD = 1400 mV
No Pre-emphasis
- 0.14 -
- 0.14 -
- 0.14 UI
Total Jitter
(peak-to-peak)
Data Rate =
-
1.25 Gbps
REFCLK = 125 MHz
Pattern = CRPAT
V_OD = 1400 mV
No Pre-emphasis
GIGE Receiver Jitter Tolerance (12)
- 0.279 -
- 0.279 -
- 0.279 UI
Deterministic Jitter
Tolerance
(peak-to-peak)
Data Rate =
1.25 Gbps
REFCLK = 125 MHz
Pattern = CJPAT
No Equalization
> 0.4
> 0.4
> 0.4
UI
Combined
Deterministic and
Random Jitter
Tolerance
(peak-to-peak)
Data Rate =
1.25 Gbps
REFCLK = 125 MHz
Pattern = CJPAT
No Equalization
HiGig Transmit Jitter Generation (4), (13)
> 0.66
> 0.66
> 0.66
UI
Deterministic Jitter Data Rate =
-
- 0.17
-
UI
(peak-to-peak) 3.75 Gbps
REFCLK =
187.5 MHz
Pattern = CJPAT
V_OD = 1200 mV
No Pre-emphasis
Total Jitter
Data Rate =
-
- 0.35
-
UI
(peak-to-peak) 3.75 Gbps
REFCLK =
187.5 MHz
Pattern = CJPAT
V_OD = 1200 mV
No Pre-emphasis
Altera Corporation
October 2007
4–25
Stratix II GX Device Handbook, Volume 1