EP2SGX30C Datasheet, PDF (281/314 Pages) Altera Corporation – Stratix II GX Device

DC and Switching Characteristics
Table 4–94. Stratix II GX Maximum Output Clock Rate for Column Pins (Series Termination) (Part 2
of 2)
I/O Standard Drive Strength -3 Speed Grade -4 Speed Grade -5 Speed Grade
SSTL-18 Class I OCT_50_OHMS
560
400
350
SSTL-18 Class II OCT_25_OHMS
550
500
450
1.5-V HSTL
OCT_50_OHMS
600
550
500
Class I
1.8-V HSTL
OCT_50_OHMS
650
600
600
Class I
1.8-V HSTL
OCT_25_OHMS
500
500
450
Class II
Differential
OCT_50_OHMS
600
500
500
SSTL-2 Class I
Differential
OCT_25_OHMS
600
550
500
SSTL-2 Class II
Differential
OCT_50_OHMS
560
400
350
SSTL-18 Class I
Differential
OCT_25_OHMS
550
500
450
SSTL-18 Class II
1.8-V differential OCT_50_OHMS
650
600
600
HSTL Class I
1.8-V differential OCT_25_OHMS
500
500
450
HSTL Class II
1.5-V differential OCT_50_OHMS
600
550
500
HSTL Class I
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Table 4–95 shows the maximum output clock toggle rate for Stratix II GX
device series-terminated row pins.
Table 4–95. Stratix II Maximum Output Clock Rate for Row Pins (Series Termination) (Part 1 of 2)
I/O Standard
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
Drive Strength -3 Speed Grade -4 Speed Grade -5 Speed Grade
OCT_25_OHMS
400
400
350
OCT_50_OHMS
400
400
350
OCT_25_OHMS
350
350
300
OCT_50_OHMS
350
350
300
OCT_25_OHMS
350
350
300
OCT_50_OHMS
350
350
300
OCT_50_OHMS
700
550
450
OCT_50_OHMS
550
450
400
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Altera Corporation
October 2007
4–111
Stratix II GX Device Handbook, Volume 1