EP2SGX30C Datasheet, PDF (254/314 Pages) Altera Corporation – Stratix II GX Device

Timing Model
Table 4–82. Default Loading of Different I/O Standards for Stratix II GX
Devices (Part 2 of 2)
I/O Standard
SSTL-18 Class I
SSTL-18 Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
1.8-V HSTL Class I
1.8-V HSTL Class II
Differential SSTL-2 Class I
Differential SSTL-2 Class II
Differential SSTL-18 Class I
Differential SSTL-18 Class II
1.5-V differential HSTL Class I
1.5-V differential HSTL Class II
1.8-V differential HSTL Class I
1.8-V differential HSTL Class II
LVDS
Capacitive Load
Unit
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
0
pF
I/O Delays
See Tables 4–83 through 4–87 for I/O delays.
Table 4–83. I/O Delay Parameters
Symbol
t_DIP
t_OP
t_PCOUT
t_PI
Parameter
Delay from I/O datain to output pad
Delay from I/O output register to output pad
Delay from input pad to I/O dataout to core
Delay from input pad to I/O input register
Table 4–84. Stratix II GX I/O Input Delay for Column Pins (Part 1 of 3)
I/O Standard
LVTTL
Parameter
Fast Corner
Industrial/
Commercial
-3 Speed
Grade (2)
t_PI
707
1223
t_PCOUT
428
787
-3 Speed
Grade (3)
-4 Speed
Grade
-5 Speed
Grade
Unit
1282
825
1364
878
1637 ps
1054 ps
4–84
Stratix II GX Device Handbook, Volume 1
Altera Corporation
October 2007