XQ2V1000_1 Datasheet, PDF (61/134 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Platform FPGAs

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QPro Virtex-II 1.5V Platform FPGAs
Table 43: Delay Measurement Methodology
Standard
LVTTL
V_L(1)
0
LVCMOS33
0
LVCMOS25
0
LVCMOS18
0
LVCMOS15
0
PCI33_3
PCI66_3
PCIX33_3
GTL
GTLP
HSTL Class I
HSTL Class II
HSTL Class III
HSTL Class IV
SSTL3 I & II
SSTL2 I & II
AGP
LVDS_25
V_REF – 0.2
V_REF – 0.2
V_REF – 0.5
V_REF – 0.5
V_REF – 0.5
V_REF – 0.5
V_REF – 1.0
V_REF – 0.75
V_REF – (0.2xV_CCO)
1.2 – 0.125
LVDS_33
1.2 – 0.125
LVDSEXT_25
1.2 – 0.125
LVDSEXT_33
1.2 – 0.125
ULVDS_25
0.6 – 0.125
LDT_25
0.6 – 0.125
LVPECL
1.6 –0.3
V_H(1)
3
3.3
2.5
1.8
1.5
Per PCI Specification
Per PCI Specification
Per PCI–X Specification
V_REF + 0.2
V_REF + 0.2
V_REF + 0.5
V_REF + 0.5
V_REF + 0.5
V_REF + 0.5
V_REF + 1.0
V_REF + 0.75
V_REF + (0.2xV_CCO)
1.2 + 0.125
1.2 + 0.125
1.2 + 0.125
1.2 + 0.125
0.6 + 0.125
0.6 + 0.125
1.6 + 0.3
Meas. Point
1.4
1.65
1.25
0.9
0.75
V_REF
V_REF
V_REF
V_REF
V_REF
V_REF
V_REF
V_REF
V_REF
1.2
1.2
1.2
1.2
0.6
0.6
1.6
Notes:
1. Input waveform switches between V_Land V_H.
2. Measurements are made at V_REF (Typ), Maximum, and Minimum. Worst-case values are reported.
V_REF (Typ)⁽²⁾
–
–
–
–
–
–
–
–
0.80
1.0
0.75
0.75
0.90
0.90
1.5
1.25
Per AGP Spec
DS122 (v2.0) December 21, 2007
www.xilinx.com
Product Specification
61