XQ2V1000_1 Datasheet, PDF(47/134 Page) Xilinx, Inc – QPro Virtex-II 1.5V Platform FPGAs

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XQ2V1000_1 Datasheet, PDF (47/134 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Platform FPGAs

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QPro Virtex-II 1.5V Platform FPGAs

Readback

In this mode, configuration data from the Virtex-II FPGA

device can be read back. Readback is supported only in the

SelectMAP (master and slave) and Boundary Scan modes.

Along with the configuration data, it is possible to read back

the contents of all registers, distributed SelectRAM, and

block RAM resources. This capability is used for real-time

debugging. For more detailed configuration information, see

[Ref 1].

Bitstream Encryption

Virtex-II devices have an on-chip decryptor using one or two

sets of three keys for triple-key Data Encryption Standard

(DES) operation. Xilinx software tools offer an optional

encryption of the configuration data (bitstream) with a triple-

key DES determined by the designer.

The keys are stored in the FPGA by JTAG instruction and

retained by a battery connected to the VBATT pin, when the

device is not powered. Virtex-II devices can be configured

with the corresponding encrypted bitstream, using any of

the configuration modes described previously.

A detailed description of how to use bitstream encryption is

provided in the Virtex-II User Guide. Your local FAE can also

provide specific information on this feature.

Partial Reconfiguration

Partial reconfiguration of Virtex-II devices can be

accomplished in either Slave SelectMAP mode or

Boundary-Scan mode. Instead of resetting the chip and

doing a full configuration, new data is loaded into a specified

area of the chip, while the rest of the chip remains in

operation. Data is loaded on a column basis, with the

smallest load unit being a configuration âframeâ of the

bitstream (device size dependent).

Partial reconfiguration is useful for applications that require

different designs to be loaded into the same area of a chip,

or that require the ability to change portions of a design

without having to reset or reconfigure the entire chip.

DS122 (v2.0) December 21, 2007

www.xilinx.com

Product Specification

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