XQ2V1000_1 Datasheet, PDF (11/134 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Platform FPGAs

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QPro Virtex-II 1.5V Platform FPGAs
Input/Output Individual Options
Each device pad has optional pull-up and pull-down
resistors in all SelectI/O-Ultra configurations. Each device
pad has an optional weak-keeper in LVTTL, LVCMOS, and
PCI SelectI/O-Ultra configurations, as illustrated in Figure 6.
X-Ref Target - Figure 6
VCCO
OBUF
Clamp
Diode
Program Current
Values of the optional pull-up and pull-down resistors are in
the range 10 - 60 KΩ, which is the specification for V_CCO
when operating at 3.3V (from 3.0V to 3.6V only). The clamp
diode is always present, even when power is not.
VCCO
10-60KΩ
Weak
Keeper
VCCO
10-60KΩ
PAD
Program
Delay
IBUF
VCCAUX = 3.3V
VCCINT = 1.5V
DS031_23_011601
Figure 6: LVTTL, LVCMOS, or PCI SelectI/O-Ultra Standards
The optional weak-keeper circuit is connected to each output.
When selected, this circuit monitors the voltage on the pad
and weakly drives the pin High or Low. If the pin is connected
to a multiple-source signal, the weak-keeper holds the signal
in its last state if all drivers are disabled. Maintaining a valid
logic level in this way eliminates bus chatter. Pull-up or pull-
down resistors override the weak-keeper circuit.
LVTTL sinks and sources current up to 24 mA. The current
is programmable for LVTTL and LVCMOS SelectI/O-Ultra
standards (see Table 9). Drive-strength and slew-rate
controls for each output driver minimize bus transients. For
LVDCI and LVDCI_DV2 standards, drive strength and slew-
rate controls are not available.
Table 9: LVTTL and LVCMOS Programmable Currents (Sink and Source)
SelectI/O-Ultra
Programmable Current (Worst-Case Guaranteed Minimum)
LVTTL
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
LVCMOS33
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
LVCMOS25
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
LVCMOS18
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
LVCMOS15
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
24 mA
24 mA
24 mA
n/a
n/a
DS122 (v2.0) December 21, 2007
www.xilinx.com
Product Specification
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