XQ2V1000_1 Datasheet, PDF (6/134 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Platform FPGAs

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QPro Virtex-II 1.5V Platform FPGAs
Virtex-II Device/Package Combinations and Maximum I/O
Wire-bond and flip-chip packages are available. Table 4
shows the maximum possible number of user I/Os in wire-
bond and flip-chip packages. Table 5 shows the number of
available user I/Os for all device/package combinations.
• FG denotes wire-bond fine-pitch plastic BGA (1.00 mm
pitch).
• BG denotes wire-bond standard plastic BGA (1.27 mm
pitch).
• CG denotes wire-bond fine-pitch hermetic ceramic
column grid array (1.27 mm pitch).
• CF denotes flip-chip fine-pitch non-hermetic ceramic
column grid Array (1.00 mm pitch).
• EF denotes epoxy-coated flip-chip BGA package
(1.00 mm pitch).
The number of I/Os per package include all user I/Os except
the 15 control pins (CCLK, DONE, M0, M1, M2, PROG_B,
PWRDWN_B, TCK, TDI, TDO, TMS, HSWAP_EN, DXN,
DXP, and RSVD) and VBATT.
Table 4: Package Information
Package
FG456
Pitch (mm)
1.00
Size (mm)
23 x 23
BG575
1.27
31 x 31
BG728 & CG717
1.27
35 x 35
EF957
1.27
40 x 40
CF1144
1.00
35 x 35
EF1152
1.00
35 x 35
Table 5: Virtex-II Device/Package Combinations and Maximum Number of Available I/Os
Package
XQ2V1000
Available I/Os
XQ2V3000
FG456
324
–
BG575
328
–
BG728
–
516
CG717
–
516
EF957
–
–
CF1144
–
–
EF1152
–
–
Notes:
1. The BG728 and CG717 packages are pinout (footprint) compatible.
2. The CF1144 is pinout (footprint) compatible with the FF1152.
XQ2V6000
–
–
–
–
684
824
824
DS122 (v2.0) December 21, 2007
www.xilinx.com
Product Specification
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