XQ2V1000_1 Datasheet, PDF (31/134 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Platform FPGAs

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X-Ref Target - Figure 32
X-Ref Target - Figure 33
X-Ref Target - Figure 34
QPro Virtex-II 1.5V Platform FPGAs
Data_in
Internal
DI _Memory
DO
Data_out = Data_in
CLK
WE
Data_in
New
Address
aa
RAM Contents
Old
New
Data_out
New
Figure 32: WRITE_FIRST Mode
DS031_14_102000
Data_in
Internal
DI _Memory
DO
Prior stored data
CLK
WE
Data_in
Address
RAM Contents
Data_out
New
aa
Old
New
Old
Figure 33: READ_FIRST Mode
DS031_13_102000
Data_in
Internal
DI _Memory
DO
No change during write
CLK
WE
Data_in
Address
RAM Contents
Data_out
New
aa
Old
New
Last Read Cycle Content (no change)
Figure 34: NO_CHANGE Mode
DS031_12_102000
DS122 (v2.0) December 21, 2007
www.xilinx.com
Product Specification
31