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XQ2V1000_1 Datasheet, PDF (40/134 Pages) Xilinx, Inc – QPro Virtex-II 1.5V Platform FPGAs
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QPro Virtex-II 1.5V Platform FPGAs
Operating Modes
The frequency ranges of DCM input and output clocks depend on the operating mode specified, either low-frequency mode
or high-frequency mode, according to Table 27. (For actual values, see "QPro Virtex-II Switching Characteristics".) The
CLK2X, CLK2X180, CLK90, and CLK270 outputs are not available in high-frequency mode.
High or low-frequency mode is selected by an attribute.
Table 27: DCM Frequency Ranges
Output Clock
Low-Frequency Mode
CLKIN Input
CLK Output
CLK0, CLK180
CLKIN_FREQ_DLL_LF CLKOUT_FREQ_1X_LF
CLK90, CLK270
CLKIN_FREQ_DLL_LF CLKOUT_FREQ_1X_LF
CLK2X, CLK2X180
CLKIN_FREQ_DLL_LF CLKOUT_FREQ_2X_LF
CLKDV
CLKIN_FREQ_DLL_LF CLKOUT_FREQ_DV_LF
CLKFX, CLKFX180
CLKIN_FREQ_FX_LF CLKOUT_FREQ_FX_LF
High-Frequency Mode
CLKIN Input
CLK Output
CLKIN_FREQ_DLL_HF CLKOUT_FREQ_1X_HF
NA
NA
NA
NA
CLKIN_FREQ_DLL_HF CLKOUT_FREQ_DV_HF
CLKIN_FREQ_FX_HF CLKOUT_FREQ_FX_HF
Locations/Organization
Virtex-II DCMs are placed on the top and the bottom of each
block RAM and multiplier column. The number of DCMs
depends on the device size, as shown in Table 28.
Table 28: DCM Organization
Device
Columns
XQ2V1000
4
XQ2V3000
6
XQ2V6000
6
DCMs
8
12
12
DS122 (v2.0) December 21, 2007
www.xilinx.com
Product Specification
40