W83627DHG Datasheet, PDF (99/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
8.54 Reserved Register - Index 5Fh (Bank 0)
8.55 CPUFANOUT1 PWM Output Frequency Configuration Register - Index 60h
(Bank 0)
Register Location:
60h
Power on Default Value:
04h
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
PWM_SCALE4
PWM_CLK_SEL4
The register is only meaningful when CPUFANOUT1 is programmed for PWM output.
Bit 7: CPUFANOUT1 PWM Input Clock Source Select. This bit selects the clock source for PWM
output.
0: clock source is 24 MHz.
1: clock source is 180 KHz.
Bit 6-0: CPUFANOUT1 PWM Pre-Scale divider. The clock source of PWM output is divided by this
seven-bit value to calculate the actual PWM output frequency.
PWM output frequency = ^{Input Clock} ∗ ¹
Pre_Scale Divider 256
The maximum value of the divider is 127 (7Fh), and it should not be set to 0.
8.56 CPUFANOUT1 Output Value Select Register - Index 61h (Bank 0)
Register Location:
61h
Power on Default Value:
Strap by FAN_SET2(Pin 83)
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
CPUFANOUT1 Value
Publication Release Date: Aug, 22, 2007
-87-
Version 1.4