W83627DHG Datasheet, PDF (217/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
CR E4h. (Default 00h)
BIT READ / WRITE
7
R/W
6~5
R/W
4
R/W
3
R/W
2
R/W
1~0 Reserved.
DESCRIPTION
Disable / Enable to issue a 4s long PSOUT# low pulse when the system
returns from power loss state and is supposed to be “off” as described in
CRE4[6:5],
Logical
Device
A.
(VBAT)
0: Disable.
1: Enable.
Power-loss control bits => (VBAT)
00: System always turns off when it returns from power-loss state.
01: System always turns on when it returns from power-loss state.
10: System turns off / on when it returns from power-loss state depending
on the state before the power loss.
11: User defines the state before power loss.(i.e. the last state set of
CRE6[4])
VSBGATE# Enable bit =>
0: Disable.
1: Enable.
* This bit is available both for UBE and UBF version
Keyboard wake-up options. (LRESET#)
0: Password or sequence hot keys programmed in the registers.
1: Any key.
Enable the hunting mode for all wake-up events set in CRE0.
cleared when any wake-up events is captured. (LRESET#)
0: Disable.
1: Enable.
This bit is
CR E5h. (GPIOs Reset Source Register; Default 00))
BIT READ / WRITE
DESCRIPTION
7~ 5 Reserved.
VID_MRST
4
R/W
0: VID reset by LRESET#.
1: VID reset by PWROK.
GP23_MRST
3
R/W
0: GP23 reset by LRESET#.
1: GP23 reset by PWROK.
GP22_MRST
2
R/W
0: GP22 reset by LRESET#.
1: GP22 reset by PWROK.
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Publication Release Date: Aug, 22, 2007
Version 1.4