W83627DHG Datasheet, PDF (246/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
21.3.6 SMBus Timing
TLOW ^TR
TF
SMBCLK
SMBDAT
THD:STA
THD:DAT
THIGH
TSU:DAT
TSU:STA
TBUF
P
S
S
SYMBOL
T_BUF
T_HD:STA
T_SU:STA
T_SU:STO
T_HD:DAT
T_SU:DAT
T_LOW
T_HIGH
T_F
T_R
PARAMETER
Bus Free Time between Stop and
Start Condition
Hold time after (Repeated) Start
Condition. After this period, the
first clock is generated
Repeated Start Condition setup
time
Stop Condition setup time
Data hold time
Data setup time
Clock low period
Clock high period
Clock/Data Falling Time
Clock/Data Rising Time
MIN.
4.7
4.0
4.7
4.0
300
250
4.7
4.0
-
-
TSU:STO
MAX.:
-
-
-
-
-
-
-
50
300
1000
P
UNITS
uS
uS
uS
uS
nS
nS
uS
uS
nS
nS
-234-
Publication Release Date: Aug, 22, 2007
Version 1.4