W83627DHG Datasheet, PDF (78/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
8.19 AUXFANOUT PWM Output Frequency Configuration Register - Index 10h
(Bank 0)
Register Location:
10h
Power on Default Value: 04h
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
PWM_SCALE3
PWM_CLK_SEL3
The register is only meaningful when AUXFANOUT is programmed for PWM output(i.e.,
Bank0 Index 12h, bit 0 is 0).
Bit 7: AUXFANOUT PWM Input Clock Source Select. This bit selects the clock source of PWM output
frequency.
0: clock source is 24 MHz.
1: clock source is 180 KHz.
Bit 6-0: AUXFANOUT PWM Pre-Scale divider. The clock source for PWM output is divided by this
seven-bit value to calculate the actual PWM output frequency.
PWM output frequency = ^{Input Clock} ∗ ¹
Pre_Scale Divider 256
The maximum value of the divider is 127 (7Fh), and it should not be set to 0.
8.20 AUXFANOUT Output Value Select Register - Index 11h (Bank 0)
Register Location:
11h
Power on Default Value: FFh
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
AUXFANOUT Value
Publication Release Date: Aug, 22, 2007
-66-
Version 1.4