W83627DHG Datasheet, PDF (190/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
18. VID INPUTS AND OUTPUTS
The W83627DHG provides eight pins for VID input or output function. The default function is VID input.
These pins can be configured to VID output function by setting Logical Device B, CR[F0h], bit 7 to 0.
The configuration is applied to the 8 pins as a group. None of them can be individually set to input or
output.
18.1 VID Input Detection
The W83627DHG supports Intel VRM 9/10/11 and AMD VRM VID detections. H/W strapping and S/W
programming can set the following three input levels. a) and b) can be set by H/W strapping or S/W
programming, while c) can only be set by S/W programming.
a) TTL (Vih = 2 V; Vil = 0.8V) –
1) Add a pulled-down resistor at Pin 77(EN_GTL), or
2) Set Configuration Register CR[2Ch], bit 3 to “0”;
b) GTL (Vih = 0.6 V; Vil = 0.4 V) – (Default)
1) No extra pulled-up resistor needed, or
2) Set Configuration Register CR[2Ch], bit 3 to “1”;
c) AMD VRM (Vih = 1.4V; Vil = 0.8V) –
Set Configuration Register CR[2Ch], bit 3 to “1” and Logical Device B, CR[F0h], but 6 to “1”.
The input data can be read in the data register at Logical Device B, CR[F1h], bit 7 ~ 0. It is a read/write
register where bit 7~0 corresponds to VID pin 7~0. Please note that in the input mode, writes to this
register have no effect.
18.2 VID Output Control
The output type of the eight VID pins is push-pull, and they drive to 3VCC (3.3V) when configured to
the output mode. The output data can be set in the data register (Logical Device B, CR[F1h], bit 7 ~ 0).
The written data can be read if Configuration Register CR[2Ch], bit 3 is set to “0”.
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Publication Release Date: Aug, 22, 2007
Version 1.4