W83627DHG Datasheet, PDF (91/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
8.41 Fan Divisor Register II - Index 4Bh (Bank 0)
Register Location:
4Bh
Power on Default Value:
44h
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
Reserved
Reserved
Reserved
Reserved
ADCOVSEL
ADCOVSEL
AUXFANIN0 DIV_B0
AUXFANIN0 DIV_B1
Bit 7-6: AUXFANIN0 Divisor bits1-0.
Note: Please see Bank0 Index 5Dh , Fan divisor table.
Bit 5-4: A/D Converter Clock Input select.
00: ADC clock select 22.5 KHz. (Default)
01: ADC clock select 5.6 KHz. (22.5K/4)
10: ADC clock select 1.4 KHz. (22.5K/16)
11: ADC clock select 0.35 KHz. (22.5K/64)
Bit 3-2: Reserved. These two bits should be set to 01h, the default value.
Bit 1-0: Reserved.
8.42 SMI#/OVT# Control Register - Index 4Ch (Bank 0)
Register Location:
4Ch
Power on Default Value:
10h
Attribute:
Read/Write
Size:
8 bits
7 6 5 4 32 1 0
Reserved
Reserved
OVTPOL
DIS_OVT2
DIS_OVT3
EN_T1_ONE
T2T3_INTMode
CPUFANIN1 DIV_B2
Bit 7: CPUFANIN1 Divisor bit2.
Bit 6:
1: SMI# output type of Temperature CPUTIN / AUXTIN is in Comparator Interrupt mode.
Publication Release Date: Aug, 22, 2007
-79-
Version 1.4