W83627DHG Datasheet, PDF (194/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
CR 25h. (Interface Tri-state Enable; Default 00h)
BIT READ / WRITE
7~6 Reserved.
5
R/W
UARTBTRI
4
R/W
UARTATRI
3
R/W
PRTTRI
2~1 Reserved.
0
R/W
FDCTRI.
DESCRIPTION
CR 26h. (Global Option; Default 0s000000b)
s: value by strapping
BIT READ / WRITE
DESCRIPTION
7 Reserved.
HEFRAS =>
6
R/W
= 0 Write 87h to location 2E twice.
= 1 Write 87h to location 4E twice.
The corresponding power-on strapping pin is RTSA# (Pin 51).
LOCKREG =>
5
R/W
= 0 Enable R/W configuration registers.
= 1 Disable R/W configuration registers.
4 Reserved.
3
R/W
DSFDLGRQ =>
= 0 Enable FDC legacy mode for IRQ and DRQ selection. Then DO
register (base address + 2) bit 3 is effective when selecting IRQ.
= 1 Disable FDC legacy mode for IRQ and DRQ selection. Then DO
register (base address + 2) bit 3 is not effective when selecting IRQ.
DSPRLGRQ =>
= 0 Enable PRT legacy mode for IRQ and DRQ selection. Then DCR
2
R/W
register (base address + 2) bit 4 is effective when selecting IRQ.
= 1 Disable PRT legacy mode for IRQ and DRQ selection. Then DCR
register (base address + 2) bit 4 is not effective when selecting IRQ.
DSUALGRQ =>
= 0 Enable UART A legacy mode for IRQ selection. Then HCR register
1
R/W
(base address + 4) bit 3 is effective when selecting IRQ.
= 1 Disable UART A legacy mode for IRQ selection. Then HCR register
(base address + 4) bit 3 is not effective when selecting IRQ.
DSUBLGRQ =>
= 0 Enable UART B legacy mode for IRQ selection. Then HCR register
0
R/W
(base address + 4) bit 3 is effective when selecting IRQ.
= 1 Disable UART B legacy mode for IRQ selection. Then HCR register
(base address + 4) bit 3 is not effective when selecting IRQ.
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Publication Release Date: Aug, 22, 2007
Version 1.4