W83627DHG Datasheet, PDF (166/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
12.3.7 TFIFO (Test FIFO Mode) Mode = 110
Data bytes may be read, written, or DMAed to or from the system to this FIFO in any direction. Data in
the tFIFO is not transmitted to the parallel port lines. However, data in the tFIFO may be displayed on
the parallel port data lines.
12.3.8 CNFGA (Configuration Register A) Mode = 111
This register is a read-only register. When it is read, 10h is returned indicating an 8-bit implementation.
12.3.9 CNFGB (Configuration Register B) Mode = 111
The bit definitions are as follows:
7 6 5 4 3 21 0
111
IRQx 0
IRQx 1
IRQx 2
intrValue
compress
Bit 7: This bit is read-only. It is logical 0 during a read, which means that this chip does not support
hardware RLE compression.
Bit 6: Returns the value on the ISA IRQ line to determine possible conflicts.
Bit 5-3: Reflects the IRQ resource assigned for ECP port.
CNFGB[5:3]
000
001
010
011
100
101
110
111
IRQ RESOURCE
Reflects other IRQ resources selected by PnP register (default)
IRQ7
IRQ9
IRQ10
IRQ11
IRQ14
IRQ15
IRQ5
Bit 2-0: These five bits are logical 1 during a read and can be written.
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Publication Release Date: Aug, 22, 2007
Version 1.4