W83627DHG Datasheet, PDF (121/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
z Functions and Definitions
The functions and definitions of the 8 bytes are shown in the following table.
Table 9.2 SPI Address Map
ADDRESS
BIT
FUNCTION
DESCRIPTION
Base+0
7:0
CMD
Commands or instructions of each SPI device
7:4
Base+1
3:0
MODE
ADD2
Mode execution. Please see the Table 9.3 for the
details of each mode.
Address [19:16]
Base+2
7:0
ADD1
Address [15:8]
Base+3
7:0
ADD0
Address [7:0]
Base+4
7:0
DATA0
Data byte 0
Base+5
7:0
DATA1
Data byte 1
Base+6
7:0
DATA2
Data byte 2
Base+7
7:0
DATA3
Data byte 3
z Usages
Write SPI instructions to Base+0. Set up the addresses and the data in Base+2 ~ Base+7.
Implement the instruction by setting the instruction mode in Base+1.
„ Accessing SPI Devices
Take erasing the SPI for example, first write the “Chip Erase” instruction to Base+0 and
1Xh^§1 to Base+1 (Bit3~Bit0 of Base +1 is the parameter of address[19:16].). The instruction
modes are listed in the table below. For Mode 1, only a one-byte instruction is generated. For
Mode 2, in addition to a one-byte instruction, a one-byte parameter, which is set up in
Base+4 in advance, is also generated.
§1 _{The “X” of 1X stands for the parameters of the address[19:16] (A19~A16, the most}
significant byte (MSB) of the address).
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Publication Release Date: Aug, 22, 2007
Version 1.4