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W83627DHG Datasheet, PDF (211/268 Pages) Winbond – WINBOND LPC I/O
W83627DHG
CR E4h. (GPIO2 Data Register; Default 00h)
BIT READ / WRITE
DESCRIPTION
GPIO2 Data register
R/W
For output ports, the respective bits can be read and written by the pins.
7~0
Read Only
For input ports, the respective bits can only be read by the pins. Write
accesses are ignored.
CR E5h. (GPIO2 Inversion Register; Default 00h)
BIT READ / WRITE
DESCRIPTION
GPIO2 Inversion register
7~0
R/W
0: The respective bit and the port value are the same.
1: The respective bit and the port value are inverted. (Applies to both input
and output ports)
CR E6h. (GPIO2 Status Register; Default 00h)
BIT READ / WRITE
DESCRIPTION
GPIO2 Event Status
Read Only Bit 7-0 corresponds to GP27-GP20, respectively.
7~0 Read-Clear 0 : No active edge(rising/falling) has been detected
1 : An active edge(rising/falling) has been detected
Read the status bit clears it to 0.
CR E7h. (GPIO3 Status Register; Default 00h)
BIT READ / WRITE
DESCRIPTION
GPIO3 Event Status
Read Only Bit 7-0 corresponds to GP37-GP30, respectively.
7~0 Read-Clear 0 : No active edge(rising/falling) has been detected
1 : An active edge(rising/falling) has been detected
Read the status bit clears it to 0.
CR E8h. (GPIO4 Status Register; Default 00h)
BIT READ / WRITE
DESCRIPTION
GPIO4 Event Status
Read Only Bit 7-0 corresponds to GP47-GP40, respectively.
7~0 Read-Clear 0 : No active edge(rising/falling) has been detected
1 : An active edge(rising/falling) has been detected
Reading the status bit clears it to 0.
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Publication Release Date: Aug, 22, 2007
Version 1.4