W83627DHG Datasheet, PDF (208/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
20.9 Logical Device 8 (WDTO# & PLED)
CR 30h. (Default 00h)
BIT READ / WRITE
DESCRIPTION
7~1 Reserved.
0
R/W
0: WDTO# and PLED are inactive. 1: Activate WDTO# and PLED.
CR F5h. (WDTO#, PLED and KBC P20 Control Mode Register; Default 00h)
BIT READ / WRITE
DESCRIPTION
Select Power LED mode.
00: Power LED pin is driven high.
7~6
R/W
01: Power LED pin is driven low.
10: Power LED pin outputs 1Hz pulse with 50% duty cycle.
11: Power LED pin outputs 0.25Hz pulse with 50% duty cycle.
5 Reserved.
WDTO# count mode is 1000 times faster.
0: Disable.
4
R/W
1: Enable.
(If bit-3 is in Second Mode, the count mode is 1/1000 sec.)
(If bit-3 is in Minute Mode, the count mode is 1/1000 min.)
Select WDTO# count mode.
3
R/W
0: Second Mode.
1: Minute Mode.
Enable the rising edge of a KBC reset (P20) to issue a time-out event.
2
R/W
0: Disable.
1: Enable.
Disable / Enable the WDTO# output low pulse to the KBRST# pin (PIN60)
1
R/W
0: Disable.
1: Enable.
0 Reserved.
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Publication Release Date: Aug, 22, 2007
Version 1.4