W83627DHG Datasheet, PDF (193/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
CR 24h. (Global Option; Default 0100_0ss0b)
s: value by strapping
BIT READ / WRITE
DESCRIPTION
Select output type of CPUFANOUT1
7
R/W
=0 CPUFANOUT1 is Push-pull. (Default)
=1 CPUFANOUT1 is Open-drain.
CLKSEL => Input clock rate selection
6
R/W
= 0 The clock input on pin 18 is 24 MHz.
= 1 The clock input on pin 18 is 48 MHz. (Default)
Select output type of AUXFANOUT
5
R/W
=0 AUXFANOUT is Push-pull. (Default)
=1 AUXFANOUT is Open-drain.
Select output type of SYSFANOUT
4
R/W
=0 SYSFANOUT is Open-drain. (Default)
=1 SYSFANOUT is Push-pull.
Select output type of CPUFANOUT0
3
R/W
=0 CPUFANOUT0 is Open-drain. (Default)
=1 CPUFANOUT0 is Push-pull.
ENKBC => Enable keyboard controller
= 0 KBC is disabled after hardware reset.
2
Read Only _{= 1 KBC is enabled after hardware reset.}
This bit is read-only, and it is set or reset by a power-on strapping pin (Pin
54, SOUTA).
1
R/W
0 Reserved.
ENROM => Enable Serial Peripheral Interface
= 0 ROM is disabled after hardware reset.
= 1 ROM is enabled after hardware reset.
This bit is set or reset by a power-on strapping pin (Pin 52, DTRA#).
Note 1
Note1:
Disable Serial Peripheral Interface
Pin 2 Æ GP23
Pin 19 Æ GP22
Pin 58 Æ AUXFANIN1
Pin 118ÆBEEP
Enable Serial Peripheral Interface
Pin 2 Æ SCK
Pin 19 Æ SCE
Pin 58 Æ SI
Pin 118ÆSO
-181-
Publication Release Date: Aug, 22, 2007
Version 1.4