W83627DHG Datasheet, PDF (180/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
Three control bits (ENMDAT_UP, MSRKEY, MSXKEY) define the combinations of the mouse wake-up
events. Please see the following table for the details.
ENMDAT_UP
(LOGICAL DEVICE A,
CR[E6H], BIT 7)
1
1
0
0
0
0
Table 14.1
MSRKEY
(LOGICAL DEVICE A,
CR[E0H], BIT 4)
MSXKEY
(LOGICAL
DEVICE A,
CR[E0H], BIT 1)
x
1
x
0
0
1
1
1
0
0
1
0
WAKE-UP EVENT
Any button clicked or any
movement.
One click of the left or right
button.
One click of the left button.
One click of the right button.
Two clicks of the left button.
Two clicks of the right button.
14.3 Resume Reset Logic
The RSMRST# (Pin 75) signal is a reset output and is used as the 3VSB power-on reset signal for the
South Bridge.
When the W83627DHG detects the 3VSB voltage rises to “V1”, it then starts a delay – “t1” before the
rising edge of RSMRST# asserting. If the 3VSB voltage falls below “V2”, the RSMRST# de-asserts
immediately.
Timing and voltage parameters are shown in Figure 14.5 and Table 14.2.
t1
RSMRST#
V1
3VSB
V2
Figure 14.5
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Publication Release Date: Aug, 22, 2007
Version 1.4