W83627DHG Datasheet, PDF (177/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
14.1.1 PSON# Logic
14.1.1.1. Normal Operation
The PSOUT# signal will be asserted low if the PSIN# signal is asserted low. The PSOUT# signal is
held low for as long as the PSIN# is held low. The South Bridge controls the SUSB# signal through the
PSOUT# signal. The PSON# is directly connected to the power supply to turn on or off the power.
Figure 14.2 shows the power on and off sequences.
The ACPI state changes from S5 to S0, then to S5
PSON#
SUSB# (Intel Chipset)
SUSB# (Other Chipset)
PSOUT#
PSIN#
3VSB
S5 State
S0 State
Figure 14.2
S5 State
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Publication Release Date: Aug, 22, 2007
Version 1.4