W83627DHG Datasheet, PDF (164/268 Pages) Winbond – WINBOND LPC I/O

W83627DHG
12.3.2 Data and ecpAFifo Port
Modes 000 (SPP) and 001 (PS/2) (Data Port)
During a write operation, the Data Register latches the contents of the data bus on the rising edge of
the input, and the contents of this register are output to PD0-PD7. During a read operation, ports
PD0-PD7 are read and output to the host. The bit definitions are as follows:
7 6543 21 0
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
Mode 011 (ECP FIFO-Address/RLE)
A data byte written to this address is placed in the FIFO and tagged as an ECP Address/RLE. The
hardware at the ECP port transmits this byte to the peripheral automatically. This operation is defined
only for the forward direction. The bit definitions are as follows:
7 6 5 4 32 1 0
Address or
RLE
Address/RLE
12.3.3 Device Status Register (DSR)
These bits are logical 0 during a read of the Printer Status Register. The bits of this status register are
defined as follows:
7 65 43 2 1 0
11 1
nFault
Select
PError
nAck
nBusy
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Publication Release Date: Aug, 22, 2007
Version 1.4